DocumentCode :
2825679
Title :
Implementation of fast cosine transform on the Motorola DSP 96002 digital signal processor
Author :
Tang, S.K. ; Chan, S.C. ; Ho, K.L. ; Lam, F.K.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ., Hong Kong
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
73
Abstract :
The implementation of a fast cosine transform (FCT) algorithm on the Motorola DSP 96002 floating point digital signal processor is investigated. The algorithm adopted is one that was recently proposed by two of the authors (see S.C. Chan and K.L. Ho, 1990). Significant changes have been made to the basic algorithm to cope with the architectural features of the processor. Detailed timing results and limitations imposed by the processor are also presented
Keywords :
digital arithmetic; digital signal processing chips; transforms; Motorola DSP 96002 digital signal processor; algorithm; architectural features; fast cosine transform; floating point digital signal processor; timing results; Cities and towns; Complexity theory; Digital signal processing; Digital signal processors; Discrete cosine transforms; Fast Fourier transforms; Image processing; Signal processing algorithms; Speech processing; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176276
Filename :
176276
Link To Document :
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