Doing more with less: a recipe for rapid IDDQ development

Author

Ackerman, Richard

Author_Institution

Sharp Microelectron. of the Americas, Camas, WA, USA

fYear

2004

fDate

38102

Firstpage

33

Lastpage

42

Abstract

This paper describes the method for developing and deploying IDDQ testing on two 0.18 μm chips developed at SMA. By using the self-scaling ratio-based IDDQ technique developed by Peter Maxwell, SMA is able to effectively screen defective devices without incurring unnecessary yield penalties. This paper documents the method of generating IDDQ vectors, qualifying them through temperature analysis, characterizing the devices setting the limits, and integrating the final product into the production test. As a case study, the results of this technique are discussed as they pertain to SMA´s chips.

Keywords

integrated circuit testing; leakage currents; 0.18 micron; IDDQ testing; IDDQ vectors; defective device screening; leakage current; production test; self-scaling ratio-based IDDQ technique; temperature analysis; Automatic test pattern generation; Character generation; Current measurement; Leakage current; Microelectronics; Production; Semiconductor device measurement; Test pattern generators; Testing; Vectors;

fLanguage

English

Publisher

ieee

Conference_Titel

Current and Defect Based Testing, 2004. DBT 2004. Proceedings. 2004 IEEE International Workshop on

Print_ISBN

0-7803-8950-6

Type

conf

DOI

10.1109/DBT.2004.1408951

Filename

1408951