DocumentCode :
2826073
Title :
Non-sequential processing: bridging the semantic gap left by the von Neumann architecture
Author :
Verhulst, Eric
Author_Institution :
Eonic Syst. Inc., USA
fYear :
1997
fDate :
3-5 Nov 1997
Firstpage :
35
Lastpage :
49
Abstract :
Parallel processing has proven to be easy to implement in hardware but difficult to deliver because of the software problems. First, the distributed semantics in the Virtuoso RTOS, based on the CSP model, will be described to demonstrate how to overcome this gap. A more radical solution will then be described which no longer defines programming as a procedure that operates on data, but as a specification of data sets that require transformations. While this can be emulated on top of the CSP model, more efficient hardware implementations are possible. The author speculates that this could result in architectures that are hard real-time and optimised by design
Keywords :
communicating sequential processes; parallel processing; CSP model; Virtuoso RTOS; data sets specification; hard real-time; hardware implementations; non-sequential processing; parallel processing; semantic gap; software problems; von Neumann architecture; Computer architecture; Computer languages; Context; Design optimization; Hardware; Java; Kernel; Parallel processing; Processor scheduling; Programming;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems, 1997. SIPS 97 - Design and Implementation., 1997 IEEE Workshop on
Conference_Location :
Leicester
ISSN :
1520-6130
Print_ISBN :
0-7803-3806-5
Type :
conf
DOI :
10.1109/SIPS.1997.625685
Filename :
625685
Link To Document :
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