DocumentCode :
2826871
Title :
Modelling the dynamic response of on-chip decoupling capacitors
Author :
Vázquez, Josep Rius ; Meijer, Maurice
Author_Institution :
Departament d´´Enginyeria Electronica, Univ. Politecnica de Catalunya, Spain
fYear :
2004
fDate :
9-12 May 2004
Firstpage :
39
Lastpage :
42
Abstract :
High-speed digital circuits require increasing amounts of on-chip decoupling capacitors (decaps) to preserve power integrity. Therefore, proper modelling and analysis of the dynamic response of such decaps in the high frequency range is needed. This paper shows that, in that range, lumped decap models fail and have to be substituted by distributed models. A derivation of such distributed model based on physical grounds is presented and compared with SPICE non-quasi static MOS models.
Keywords :
SPICE; capacitors; digital circuits; high-speed integrated circuits; integrated circuit modelling; semiconductor device models; SPICE nonquasi static MOS models; decaps; distributed models; dynamic response analysis; dynamic response modelling; high-speed digital circuits; lumped decap models; on-chip decoupling capacitors; physical grounds; power integrity; Analytical models; Capacitance; Circuit simulation; Electrostatic discharge; Frequency; MOS capacitors; MOSFETs; SPICE; Switched capacitor circuits; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Propagation on Interconnects, 2004. Proceedings. 8th IEEE Workshop on
Print_ISBN :
0-7803-8470-9
Type :
conf
DOI :
10.1109/SPI.2004.1408996
Filename :
1408996
Link To Document :
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