DocumentCode :
2827003
Title :
PEEC methods in 2D signal line modeling for mid-frequency on-chip power supply noise simulations
Author :
Rauscher, Jürgen ; Pfleiderer, Hans-Jörg
Author_Institution :
Dept. of Microelectron., Ulm Univ., Germany
fYear :
2004
fDate :
9-12 May 2004
Firstpage :
49
Lastpage :
52
Abstract :
In this paper a 2D signal line model is used to simulate the power distribution network (PDN). The proposed method uses an admittance function to model the frequency-dependent resistance and inductance in each direction. This admittance function can be gained directly by model order reduction from a partial element equivalent circuit (PEEC) model. Hence, it is possible to efficiently calculate the model parameters even for irregular PDNs. A fast transient simulation algorithm closely related to the finite-difference time-domain (FDTD) schemes is presented. The alternating-direction-implicit (ADI) method relaxes the time step for the simulation, because it is not limited by a stability criterion.
Keywords :
circuit simulation; equivalent circuits; finite difference time-domain analysis; integrated circuit modelling; integrated circuit noise; power supply circuits; 2D signal line modeling; ADI method; FDTD schemes; PEEC model; admittance function; alternating-direction-implicit method; fast transient simulation algorithm; finite-difference time-domain schemes; frequency-dependent inductance; frequency-dependent resistance; mid-frequency on-chip power supply noise simulations; model order reduction; partial element equivalent circuit; power distribution network; stability criterion; Admittance; Circuit simulation; Circuit stability; Equivalent circuits; Finite difference methods; Frequency; Inductance; Power supplies; Power systems; Time domain analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Propagation on Interconnects, 2004. Proceedings. 8th IEEE Workshop on
Print_ISBN :
0-7803-8470-9
Type :
conf
DOI :
10.1109/SPI.2004.1409000
Filename :
1409000
Link To Document :
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