VLSI system compiler for digital signal processing: Extended modularization and placement

A VLSI system compiler which generates a highly parallel and fast processor array on a VLSI chip for general digital signal processing algorithms is described. It consists of several stages to convert processing algorithms into a suitable one for VLSI implementation. An extended modularization and a placement of general digital signal processing algorithms are proposed as parts of the VLSI system compiler. A novel modularization algorithm is presented which will homogenize operations in DSP (digital signal processing) algorithms of a wider input class than before. A placement algorithm is developed which embeds inner-product processors with the requirement of random interprocessor communications into a rectangular processor array without losing the inherent highly parallel processing nature