Title :
Analysis of crosstalk coupling effects between aggressor and victim interconnect using two-port network model
Author :
Palit, Ajoy K. ; Meyer, Volker ; Anheier, Walter ; Schloeffel, Juergen
Author_Institution :
Inst. of Electromagn. Theor. & Microelectron., Bremen Univ., Germany
Abstract :
Signal integrity (SI) losses in the interconnects are the disturbances coming out of their distributed nature of parasitic capacitances, resistances, and inductances at high frequency operation by A. Attartha and M. Nourani (2002). SI losses are further aggravated if multiple interconnect lines couple energy from, or to each other. Therefore, this paper aims to analyze the cross-talk coupling effects between the two interconnects, namely the aggressor and victim lines, using the ABCD two-port network model. In order to reduce the simulation time a reduced order modeling of the interconnect line is considered. Furthermore, as stated in various literatures by A. Sinha et al. (1999) the rising (or falling) input signal represented by a simple step function is not accurate enough, therefore in this paper the rising transitions and the falling transitions are represented more accurately using the exponential terms, and based on such input representation the time domain output signal voltage in presence of crosstalk noise, at the far end side of both aggressor line and victim line, is determined. Such output voltage representation is very helpful in estimating the delay, overshoot or undershoot etc., which are believed to cause SI losses in the SoC.
Keywords :
coupled circuits; crosstalk; integrated circuit interconnections; network analysis; system-on-chip; two-port networks; ABCD two-port network model; SoC; aggressor line; crosstalk coupling effect analysis; crosstalk noise; falling transitions; high frequency operation; inductances; interconnect line; interconnects; multiple interconnect lines couple energy; parasitic capacitances; resistances; signal integrity losses; simulation time reduction; time domain output signal voltage; victim interconnect; voltage representation; Circuit testing; Coupling circuits; Crosstalk; Delay estimation; Electromagnetic coupling; Integrated circuit interconnections; Integrated circuit testing; Signal design; Voltage; Wires;
Conference_Titel :
Signal Propagation on Interconnects, 2004. Proceedings. 8th IEEE Workshop on
Print_ISBN :
0-7803-8470-9
DOI :
10.1109/SPI.2004.1409011