• DocumentCode
    2827586
  • Title

    Implementation of `multiply-add´ FFT algorithms for complex and real data sequences

  • Author

    Lu, Chao

  • Author_Institution
    Dept. of Comput. Sci., Towson State Univ., MD, USA
  • fYear
    1991
  • fDate
    11-14 Jun 1991
  • Firstpage
    480
  • Abstract
    Multiply-add FFT algorithms are FFT algorithms that take advantage of computer architectures with a multiply-add feature. Various FFT algorithms can be implemented on this type of architecture to give the multiplications for free. In the present work, some of these FFT algorithms are reviewed: the split-radix FFT algorithm for 2k transform sizes, the multiplicative algorithms for prime transform sizes, and the prime factor algorithm for transform sizes with relatively prime factors. Both complex and real data sequences are considered, and operational counts are evaluated in terms of total floating-point operations. Tensor product formulation is used throughout for producing variants of algorithms matching to computer architecture
  • Keywords
    computerised signal processing; fast Fourier transforms; matrix algebra; complex data sequence; computer architectures; multiplicative algorithms; multiply-add FFT algorithm; prime factor algorithm; prime transform sizes; real data sequences; relatively prime factors; split-radix FFT algorithm; tensor product formulation; total floating-point operations; Algorithm design and analysis; Chaos; Computer architecture; Delay effects; Digital signal processing chips; Fourier transforms; Large-scale systems; Reduced instruction set computing; Tensile stress; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1991., IEEE International Sympoisum on
  • Print_ISBN
    0-7803-0050-5
  • Type

    conf

  • DOI
    10.1109/ISCAS.1991.176377
  • Filename
    176377