DocumentCode
2827876
Title
A frequency domain approach for efficient model reduction of mixed VLSI circuits
Author
Amghayrir, A. ; Bréhonnet, P. ; Tanguy, N. ; Vilbé, P. ; Calvez, L.C. ; Huret, F.
Author_Institution
LEST-UBO, UMR CNRS, Brest, France
fYear
2004
fDate
9-12 May 2004
Firstpage
171
Lastpage
174
Abstract
It has become well accepted that interconnect delay dominates gate delay in current VLSI circuits. This paper introduces a new method, based on a frequency domain approach, for the simulation of interconnect problems found in high speed digital circuits and SOC-AMS.
Keywords
VLSI; circuit simulation; delays; frequency-domain analysis; high-speed integrated circuits; integrated circuit interconnections; mixed analogue-digital integrated circuits; SOC-AMS; current VLSI circuits; frequency domain approach; gate delay; high speed digital circuits; interconnect delay; interconnect problem simulation; mixed VLSI circuits; model reduction; Circuit simulation; Context modeling; Dielectric substrates; Electromagnetic analysis; Electromagnetic propagation; Electromagnetic waveguides; Frequency domain analysis; Integrated circuit interconnections; Reduced order systems; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Propagation on Interconnects, 2004. Proceedings. 8th IEEE Workshop on
Print_ISBN
0-7803-8470-9
Type
conf
DOI
10.1109/SPI.2004.1409043
Filename
1409043
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