DocumentCode
2828123
Title
An efficient BIST method for small buffers
Author
Jone, Wen B ; Huang, D.C. ; Wu, S.C. ; Lee, K.J.
Author_Institution
Nat. Chung-Cheng Univ., Taiwan
fYear
1999
fDate
1999
Firstpage
246
Lastpage
251
Abstract
In this work, we propose a new built-in self-testing (BIST) method that is able to concurrently test a set of spatially distributed embedded-memory modules with different sizes. By allowing some redundant read/write operations for small modules, we develop a new march algorithm, called RSMarch, that can concurrently test all memory modules with the same fault coverage as if each module is tested individually. We also show that this method requires only one simple BIST controller and one test data line for all modules. Thus the new method has the advantages of short test time, high fault coverage and low area overhead
Keywords
buffer storage; built-in self test; cellular arrays; embedded systems; fault diagnosis; integrated circuit testing; microprocessor chips; BIST method; RSMarch; area overhead; concurrent test; fault coverage; march algorithm; redundant read/write operations; spatially distributed embedded-memory modules; test data line; test time; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Random access memory; Read-write memory; Routing; Sequential analysis; Size control; Telecommunication control;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location
Dana Point, CA
ISSN
1093-0167
Print_ISBN
0-7695-0146-X
Type
conf
DOI
10.1109/VTEST.1999.766672
Filename
766672
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