DocumentCode :
2828257
Title :
Execution of Algorithms Using a Dynamic Dataflow Model for Reconfigurable Hardware - Commands in Dataflow Graph
Author :
Astolfi, Vitor Fiorotto ; Silva, Jorge Luiz E
Author_Institution :
Sao Paulo Univ., Sao Carlos
fYear :
2007
fDate :
28-26 Feb. 2007
Firstpage :
225
Lastpage :
230
Abstract :
Many modern scientific and engineering applications such as weather forecast, medical diagnostics, artificial intelligence, and industrial automation, demand increased computational capacity. Actual high-performance architectures are focused on the concepts of parallel processing. One of these architectures is the dataflow model, which explores parallelism in a natural form. This paper describes briefly the dataflow model and its dynamic dataflow graph (DDFG), which is the basic structure to execute dataflow programs. DDFGs of control flow statements used in the C language, such as do-while and switch, are proposed. The results of a "proof-of-concept" for the control flow DDFGs are presented at the end of this paper.
Keywords :
C language; data flow computing; data flow graphs; electronic engineering computing; field programmable gate arrays; parallel architectures; reconfigurable architectures; C language; control flow statement; dataflow program; do-while statement; dynamic dataflow graph model; engineering application; high-performance architecture; parallel processing; reconfigurable hardware; scientific application; switch statement; Artificial intelligence; Biomedical engineering; Computer architecture; Demand forecasting; Hardware; Heuristic algorithms; Medical diagnosis; Parallel processing; Switches; Weather forecasting; Commands; Dataflow; do-while; proof-of-concept; switch;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Programmable Logic, 2007. SPL '07. 2007 3rd Southern Conference on
Conference_Location :
Mar del Plata
Print_ISBN :
1-4244-0606-4
Type :
conf
DOI :
10.1109/SPL.2007.371755
Filename :
4234352
Link To Document :
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