A digital BIST for operational amplifiers embedded in mixed-signal circuits

Author

Rayane, I. ; Velasco-Medina, J. ; Nicolaidis, M.

Author_Institution

TIMA/INPG, Grenoble, France

fYear

1999

fDate

1999

Firstpage

304

Lastpage

310

Abstract

A new digital BIST structure is proposed in this paper. During test mode, the op amp under test is placed in a voltage follower configuration in order to detect its slew-rate deviation, or in a comparator configuration in order to detect its signal propagation delay deviation. The test stimuli and the BIST control signals are simply derived from the test control signal TST using delay elements and logical gates. The test response is analyzed by using pure digital circuitry. Simulation results show the effectiveness of the proposed technique with a low area overhead

Keywords

built-in self test; comparators (circuits); delays; integrated circuit testing; mixed analogue-digital integrated circuits; operational amplifiers; area overhead; comparator configuration; delay elements; digital BIST; logical gates; mixed-signal circuits; operational amplifiers; signal propagation delay deviation; slew-rate deviation; test control signal; test mode; test stimuli; voltage follower configuration; Analog circuits; Built-in self-test; Circuit faults; Circuit testing; Integrated circuit testing; Logic testing; Operational amplifiers; Read only memory; Signal design; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 1999. Proceedings. 17th IEEE

Conference_Location

Dana Point, CA

ISSN

1093-0167

Print_ISBN

0-7695-0146-X

Type

conf

DOI

10.1109/VTEST.1999.766680

Filename

766680