DocumentCode
2828317
Title
Comparative Analysis of Multitask Scheduling Algorithms for Reconfigurable Computing Regarding Context Switches and Configuration Cache Usage
Author
Spies, Christopher ; Indrusiak, Leandro Soares ; Glesner, Manfred
Author_Institution
Darmstadt Univ. of Technol., Darmstadt
fYear
2007
fDate
28-26 Feb. 2007
Firstpage
239
Lastpage
242
Abstract
In this paper, we investigate the usability of several well-known real-time scheduling algorithms for a system consisting of a single processor core and multiple dynamically reconfigurable functional units, running a number of processes in parallel. A SystemC simulation model of a wireless sensor network node serves as a case study for assessing the performance of the different algorithms. Specific emphasis is given to the analysis of the configuration cache miss ratio and the number of context switches, which are indicators of costly operations of the reconfigurable units, respectively reconfiguration and saving internal state.
Keywords
parallel processing; processor scheduling; reconfigurable architectures; SystemC simulation model; configuration cache usage; context switches; multiple dynamical reconfigurable functional unit; multitask scheduling algorithm; parallel processor; reconfigurable computing; wireless sensor network; Algorithm design and analysis; Concurrent computing; Hardware; Parallel processing; Processor scheduling; Real time systems; Scheduling algorithm; Switches; Usability; Wireless sensor networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Programmable Logic, 2007. SPL '07. 2007 3rd Southern Conference on
Conference_Location
Mar del Plata
Print_ISBN
1-4244-0606-4
Type
conf
DOI
10.1109/SPL.2007.371758
Filename
4234355
Link To Document