AÃ\x97B BÃ\x97A in Terms of Power Consumption: Some Examples on FPGA

This paper shows that, under certain conditions, digital arithmetical circuits do not meet the addition commutation property in terms of power consumption. That is, the power consumed by the operation AtimesB is different from BtimesA. As a consequence, it is possible to get a power saving simply permuting the circuit inputs, wherever any of the following three conditions are present: a) the data to be processed has a strong temporal correlation; b) the delays between the circuit paths are highly unequalized; c) one of the input data communication is broadcast type, meanwhile the other is local. In order to verify these hypotheses, several binary multipliers were constructed and measured. The power consumption reduction resulted between 12% and 28% in Virtex FPGAs.