DocumentCode :
282948
Title :
First time experiences of gate array design in a university environment
Author :
Noakes, P.D. ; Green, A.D.P.
Author_Institution :
Dept. of Electron. Syst. Eng., Essex Univ., Colchester, UK
fYear :
1988
fDate :
32164
Firstpage :
42522
Lastpage :
42525
Abstract :
During the past ten years the use of Custom and semi-custom integrated circuits in industry has increased substantially and therefore it is important that new graduates should leave Universities and Polytechnics with at least an awareness of the design and fabrication of such devices. At the University of Essex, the Department of Electronic Systems Engineering has, for many years, included lecture courses in its undergraduate program concerned with the production of integrated circuits. Unfortunately, although the CAD research group developed some of its own software and eventually purchased a copy of ELLA, the Department was unable to fund the purchase of commercial software which would allow its students to undertake final year projects involving the committal to silicon of their particular circuit design. Therefore the staff interested in CAD and VLSI circuit design supported enthusiastically Peter Jones and his small group of colleagues as they endeavoured to persuade the University Grants Committee (UGC) to accept proposals on behalf of all Universities for the purchase of selected CAD software together with access to a number of silicon foundries. Thus when it was announced that the UGC (together with the Department of Trade and Industry) had accepted their proposals, discussions were initiated in the department to plan in detail how the software was going to be used
Keywords :
cellular arrays; circuit CAD; education; integrated logic circuits; CAD research group; ELLA; Polytechnics; Si foundries; Universities; University Grants Committee; VLSI; commercial software; design; fabrication; gate array design; graduates; lecture courses; semi-custom integrated circuits; university environment;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Experience in Gate Array Design, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
208715
Link To Document :
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