DocumentCode
2831020
Title
VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory
Author
Linares-Barranco, B. ; Sanchez-Sinencio, E. ; Rodriguez-Vazquez, A. ; Huertas, J.L.
Author_Institution
Texas A&M Univ., College Station, TX, USA
fYear
1991
fDate
11-14 Jun 1991
Firstpage
1283
Abstract
The authors present a complete VLSI continuous-time bidirectional associative memory (BAM). The short term memory (STM) section is implemented using small transconductance four quadrant multipliers, and capacitors for the integrators. The long term memory (LTM) is built using an additional multiplier that uses locally available signals to perform Hebbian learning. The value of the learned weight is present at a capacitor for each synapse. After learning has been accomplished the value of the stored weight voltage can be refreshed using a simple analog/digital (AD)-digital/analog (D/A) conversion, which if done fast enough, will maintain the weight value within a discrete interval of the complete weight range. Such a discretization still allows good performance of the STM section after learning is finished
Keywords
CMOS integrated circuits; VLSI; analogue storage; content-addressable storage; learning systems; neural nets; A/D to D/A conversion; CMOS VLSI; Hebbian learning; VLSI continuous-time bidirectional associative memory; dynamic analog memory; four quadrant multipliers; long term memory; multiplier; on chip learning; short term memory; stored weight voltage; transconductance mode; Analog circuits; Associative memory; Capacitors; Differential equations; Magnesium compounds; Neurons; Subspace constraints; Transconductance; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN
0-7803-0050-5
Type
conf
DOI
10.1109/ISCAS.1991.176604
Filename
176604
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