Title :
High current effects in silicide films for sub-0.25 /spl mu/m VLSI technologies
Author :
Banerjee, Kaustav ; Hu, Chenming ; Amerasekera, Ajith ; Kittl, Jorge A.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
March 31 1998-April 2 1998
Abstract :
Characterization and modeling of high current conduction in TiSi/sub 2/ and CoSi/sub 2/ films formed on n/sup +/-Si and n/sup +/ poly-Si under DC and pulsed stress conditions is reported for the first time. High current conductance of silicides is shown to be strongly affected by the technology and process conditions. The nonlinear I-V characteristics of silicide films under DC and pulsed high current stress has been modeled and the nonlinearity has been shown to be due to self-heating. Two physical parameters, B and /spl lambda/, associated with DC and pulsed current stress, have been shown to be able to describe the sensitivity of the films to high current conduction. At high currents, an abrupt lowering of the resistance of the silicided structures is observed. Detailed analysis of the evolution of this resistance drop has been made. It is shown that the cause is related to the melting of the structures, which also causes degradation in the post-stress silicide film resistance. The critical current for these failures has been shown to be strongly influenced by the silicide film width and the time duration of the pulse. CoSi/sub 2/ films and films on poly-Si are shown to be more sensitive to high current conduction and degradation.
Keywords :
VLSI; cobalt compounds; electric current; electric resistance; failure analysis; integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; melting; titanium compounds; CoSi/sub 2/ films; CoSi/sub 2/-Si; DC current stress; DC stress conditions; Si; TiSi/sub 2/ films; TiSi/sub 2/-Si; VLSI technology; critical failure current; current conductance; high current conduction; high current effects; melting; modeling; n/sup +/ poly-Si surface; n/sup +/-Si films; nonlinear I-V characteristics; physical parameters; post-stress silicide film resistance; process conditions; pulse time duration; pulsed current stress; pulsed stress conditions; resistance; self-heating; sensitivity; silicide film width; silicide films; silicided structures; silicides; CMOS process; CMOS technology; Conductive films; Contact resistance; Degradation; Electrostatic discharge; Semiconductor films; Silicides; Stress; Very large scale integration;
Conference_Titel :
Reliability Physics Symposium Proceedings, 1998. 36th Annual. 1998 IEEE International
Conference_Location :
Reno, NV, USA
Print_ISBN :
0-7803-4400-6
DOI :
10.1109/RELPHY.1998.670658