DocumentCode
2831304
Title
A unifying formalism to support automated synthesis of SBSTs for embedded caches
Author
Carlo, Stefano Di ; Gambardella, Giulio ; Indaco, Marco ; Rolfo, Daniele ; Prinetto, Paolo
Author_Institution
Dipt. di Autom. e Inf., Politec. di Torino, Torino, Italy
fYear
2011
fDate
9-12 Sept. 2011
Firstpage
39
Lastpage
42
Abstract
The paper presents a new unifying formalism introduced to effectively support the automatic generation of assembly test programs to be used as SBST (Software Based Self-Testing) for both data and instruction cache memories. In particular, the new formalism allows the description of the target memory, of the selected March Test algorithm, and the way this has to be customize to adapt it to the selected cache.
Keywords
automatic testing; cache storage; electronic engineering computing; embedded systems; instruction sets; network synthesis; assembly test programs; automated SBST synthesis; embedded caches; instruction set architecture; march test algorithm; multiplatform synthesis tool; software based self testing; Arrays; Assembly; Built-in self-test; Cache memory; Libraries; Optical wavelength conversion;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2011 9th East-West
Conference_Location
Sevastopol
Print_ISBN
978-1-4577-1957-8
Type
conf
DOI
10.1109/EWDTS.2011.6116421
Filename
6116421
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