Scheduling in Fully Buffered Multistage Switching Fabric Based on Round-Robin

Current Memory-Space-Memory Clos switching fabric exhibits poor performance under unbalanced traffic. To eliminate the internal congestion within the switching fabric, by taking buffers into the internal links, this paper proposes an alternative Fully Buffered three-stage Clos switching fabric-FBC, which not only provides perfect throughput performance, but also exhibits better delay performance in heavy load by storing cells at the internal buffers. To employ an efficient and simple scheduling process, we provide a scheduling algorithm for FBC which is named Distributed Round-Robin Scheduling algorithm(DRRS). This algorithm takes advantages of high-efficiency of round-robin and is distributed in implementation, which makes the DRRS prone to implement in hardware. At last, the simulation results prove that DRRS is more effective.