Implementation of feedforward artificial neural nets with learning using standard CMOS VLSI technology

A prototype two-layer feedforward artificial neural network (FANN) is implemented using standard CMOS VLSI technology. A simple tunable analog scalar/vector multiplier is designed and used to implement FANNs with learning. A modified learning rule is used as a circuit-implementable learning rule for FANNs. Two sequential learning circuits are designed and extensively simulated using the PSPICE circuits simulator. A modular design is proposed for a large-scale implementation of FANNs with learning. A 4×1 module is designed using the MAGIC VLSI editor and has been fabricated via MOSIS on Tinychips. The module chips can be connected vertically and horizontally to realize a large-scale FANNs with optionally using on-chip learning circuit or off-chip learning capability