A switched-capacitor successive-approximation analog-to-digital converter

A successive-approximation analog-to-digital converter is developed using switched-capacitor techniques. The threshold voltage sequence with which the input analog voltage is compared is generated by a 1-b digital-to-analog converter. The conversion process is insensitive to parasitic capacitances and offset voltages of the comparator and op-amps. Error analysis shows that a resolution higher than 11-b is attainable by implementing the architecture using presently available CMOS technologies. The component requirement is minimum. A prototype converter breadboarded using discrete components has confirmed the principles of operation