C-testability and C-configurability of reconfigurable processor array interconnection networks

Author

Henling, Brian ; Soma, Mani

Author_Institution

Washington Univ., Seattle, WA, USA

fYear

1991

fDate

11-14 Jun 1991

Firstpage

2136

Abstract

The author presents a general-purpose reconfigurable switch which allows for all possible combinations of two line interconnections of any of its bidirectional lines. This switch can be used to implement a global interconnection network for systolic arrays, wavefront arrays, or any topology with similar regular structures such as programmable logic devices. The reconfigurable switch has the desirable properties that it is both scalable and C-testable. Furthermore, the switch is shown to be C-configurable; that is, the number of configurations required to test a network of switches is independent of the size of the network

Keywords

logic arrays; multiprocessor interconnection networks; systolic arrays; C-configurability; C-testability; bidirectional lines; global interconnection network; programmable logic devices; reconfigurable processor array interconnection networks; reconfigurable switch; systolic arrays; wavefront arrays; Communication switching; Computer networks; Multiprocessor interconnection networks; Network topology; Programmable logic arrays; Programmable logic devices; Reconfigurable architectures; Switches; Systolic arrays; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., IEEE International Sympoisum on

Print_ISBN

0-7803-0050-5

Type

conf

DOI

10.1109/ISCAS.1991.176707

Filename

176707