DocumentCode :
2832689
Title :
Architectures for multi-bit oversampled A/D converter employing dynamic element matching techniques
Author :
Leung, Bosco H.
Author_Institution :
Dept. of Electr. Eng., Waterloo Univ., Ont., Canada
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
1657
Abstract :
A novel class of dynamic element matching techniques is applied to multibit Σ-Δ A/D (analog-to-digital) converters. The approach translates the harmonic distortion components of a non-ideal DAC (digital-to-analog converter) in the feedback loop of the Σ-Δ A/D converter to high-frequency components, which can then be filtered out by the decimation filter. Extensive computer simulations have confirmed that a third-order Σ-Δ A/D converter using a 3-bit quantizer and the new dynamic element matching internal DAC can achieve 104 dB (17+bit) dynamic range and a harmonic distortion below 100 dB with an oversampling ratio of only 64. A chip has been designed in 1.2 μm CMOS technology
Keywords :
CMOS integrated circuits; analogue-digital conversion; digital integrated circuits; electric distortion; feedback; 1.2 micron; 3-bit quantizer; CMOS technology; clocked averaging; computer simulations; decimation filter; digital-to-analog converter; dynamic element matching techniques; dynamic range; feedback loop; harmonic distortion components; oversampled A/D converter; oversampling ratio; sigma-delta ADC; third-order Sigma - Delta A/D converter; Analog-digital conversion; CMOS technology; Clocks; Digital filters; Feedback; Frequency conversion; Harmonic distortion; Quantization; Signal to noise ratio; Stability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176714
Filename :
176714
Link To Document :
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