Classification for 2D-DCTs and a new architecture with distributed arithmetic

Some highlights in the development of special-purpose circuits for the two-dimensional discrete cosine transform (2D-DCT) are given. In order to give a survey on the efforts made in processor design around the world, a classification of already realized and suggested VLSI architectures is proposed. The authors also present a novel architecture with a moderately fast algorithm. It exploits the computation of an N-point DCT with N/2 DCTs in a row-column decomposition. The computation of the inner products of the N/2 DCTs is realized with distributed arithmetic. A circuit is proposed, realizing both the forward and inverse transform on the same chip