Title : 
Robust stability of lateral inhibition networks in the presence of circuit parasitics
         
        
            Author : 
Devanathan, R. ; Ngee, Tan Han
         
        
            Author_Institution : 
Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore
         
        
        
        
        
            Abstract : 
In the analog VLSI implementation of neural systems, it is sometimes convenient to build lateral inhibition networks by using a locally connected on-chip resistive grid. Spontaneous oscillation often arises in these systems due to circuit parasitics rendering them unstable in practice. Necessary and sufficient conditions are given for the cell admittance functions for the stability of the system in the presence of circuit parasitics. A robust design approach for these systems is also indicated
         
        
            Keywords : 
VLSI; linear integrated circuits; network analysis; neural nets; stability; analog VLSI implementation; cell admittance functions; circuit parasitics; lateral inhibition networks; locally connected on-chip resistive grid; neural systems; robust design; stability; Admittance; Circuit stability; Integrated circuit interconnections; Intelligent networks; Neurons; Parasitic capacitance; Resistors; Robust stability; Sufficient conditions; Very large scale integration;
         
        
        
        
            Conference_Titel : 
Circuits and Systems, 1991., IEEE International Sympoisum on
         
        
            Print_ISBN : 
0-7803-0050-5
         
        
        
            DOI : 
10.1109/ISCAS.1991.176742