DocumentCode
2833627
Title
Reliability & Performance Modeling to Speed-Up the NoC Design
Author
Patooghy, Ahmad ; Miremnadi, Seyed Ghassem
Author_Institution
University of Technology, Tehran, Iran
fYear
2009
fDate
16-18 Nov. 2009
Firstpage
1
Lastpage
6
Abstract
Flow-control methods are effective ways to enhance the reliability of Network-on-Chips against transients occurring in deep sub-micron chips. This paper proposes an analytical model to predict the reliability and performance of mesh-based NoCs equipped with flowcontrol methods. In this model, mesh-based NoCs are considered as a network of M/G/1 queues. The iterative solution of the network of queues makes accurate predictions about (1) the probability of correct packet delivery in the presence of bit flip errors and (2) the average packet delivery time of NoCs. To validate the model, the performance predictions are compared with the results extracted from an event-based NoC simulator. Comparisons are done for different traffic generation rates and different error rates. The comparisons show that the proposed model accelerates the evaluation phase of an NoC design by at least three orders of magnitude.
Keywords
Communication switching; Computer networks; Design engineering; Energy consumption; Error analysis; Network-on-a-chip; Packet switching; Redundancy; Reliability engineering; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable Computing, 2009. PRDC '09. 15th IEEE Pacific Rim International Symposium on
Conference_Location
Shanghai
Print_ISBN
978-0-7695-3849-5
Type
conf
DOI
10.1109/prdc.2009.5497860
Filename
5497860
Link To Document