• DocumentCode
    2833675
  • Title

    PICHAFF ² - A Hierarchical Parallel SAT Solver

  • Author

    Schubert, T. ; Becker, B.

  • Author_Institution
    Inst. for Comput. Sci., Albert-Ludwigs-Univ. of Freiburg
  • fYear
    2004
  • fDate
    9-10 Sept. 2004
  • Firstpage
    56
  • Lastpage
    61
  • Abstract
    We present a hierarchical distributed SAT procedure for microchip PIC microcontrollers. The algorithm is an adaption of the state-of-the-art solver CHAFF optimised for the limited resources of the microchip processors. The underlying hardware environment is a special multiprocessor system based on PC ISA slot cards, each of them holding up to 9 PIC microcontrollers. We propose a novel work stealing scheme, which is able to manage multiple of these multiprocessor cards in parallel. Besides discussing technical aspects we also point out the efficiency of our approach by a set of experiments
  • Keywords
    microcontrollers; multiprocessing systems; parallel processing; peripheral interfaces; PC ISA slot cards; PICHAFF2; hierarchical distributed SAT procedure; hierarchical parallel SAT solver; microchip PIC microcontrollers; microchip processors; multiprocessor cards; multiprocessor system; Business continuity; Communication switching; Computer science; Hardware; Instruction sets; Microcontrollers; Multiprocessing systems; NP-complete problem; Switches; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microprocessor Test and Verification (MTV'04), Fifth International Workshop on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-4093
  • Print_ISBN
    0-7695-2320-X
  • Type

    conf

  • DOI
    10.1109/MTV.2004.19
  • Filename
    1563074