DocumentCode :
2833822
Title :
A fast algorithm for optimal via-shifting in channel compaction
Author :
Cai, Yang ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
fYear :
1991
fDate :
11-14 Jun 1991
Firstpage :
1940
Abstract :
The authors consider the problem of shifting vias to obtain more compactable channel routing, solutions. Given a grid-based two-layer channel routing solution S, one can obtain a new routing solution S´ by simply shifting the vias in S. In this case, S´ is said to be derivable from S. The authors address the problem ,of how to obtain a routing solution S, from S by shifting vias so that S´ would achieve minimum channel height after compaction. They present some necessary preliminary material and give the Boolean procedure which forms the backbone of the algorithm. They present the optimal algorithm for shifting for the channel routing solution. The worst-case time complexity of the algorithm is considered. The algorithm uses a technique which is similar to the greedy algorithm for computing a maximum matching for a special class of bipartite graphs called convex bipartite graphs
Keywords :
Boolean algebra; circuit layout CAD; Boolean procedure; channel compaction; channel routing; fast algorithm; minimum channel height; optimal algorithm; optimal via-shifting; worst-case time complexity; Algorithm design and analysis; Compaction; Fabrication; Routing; Spine; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
Type :
conf
DOI :
10.1109/ISCAS.1991.176786
Filename :
176786
Link To Document :
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