DocumentCode
2834197
Title
Fault tolerance of decomposed PLAs
Author
Keren, O. ; Levin, I.
Author_Institution
Sch. of Eng., Bar Ilan Univ., Ramat Gan, Israel
fYear
2010
fDate
17-20 Sept. 2010
Firstpage
86
Lastpage
91
Abstract
The paper deals with the fault tolerance of finite state machines (FSMs) implemented by nanoelectronic programmable logic arrays (PLAs). The paper studies a fault tolerant nano-PLA structure, which is based on implementing an initial FSM in a form of three interacting dense PLAs. The paper provides experimental benchmarks results for estimation of fault tolerance properties of the proposed solution. The results indicate a high efficiency of the proposed decomposition approach.
Keywords
fault tolerant computing; finite state machines; nanoelectronics; programmable logic arrays; FSM; decomposed PLA; fault tolerance properties; finite state machines; nanoelectronic programmable logic arrays; Benchmark testing; Circuit faults; Fault tolerance; Fault tolerant systems; Input variables; Programmable logic arrays; Tunneling magnetoresistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2010 East-West
Conference_Location
St. Petersburg
Print_ISBN
978-1-4244-9555-9
Type
conf
DOI
10.1109/EWDTS.2010.5742040
Filename
5742040
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