• DocumentCode
    283448
  • Title

    An overview of CAD acceleration

  • Author

    Ambler, A.P.

  • Author_Institution
    Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
  • fYear
    1988
  • fDate
    32391
  • Firstpage
    42370
  • Lastpage
    111
  • Abstract
    The computational effort required in the application of CAD tools for VLSI design has meant that the use of hardware to reduce the increasingly large CPU times is widespread-indeed the use of hardware accelerators in VLSI design to speed-up the compute intensive aspects of CAD has been available now for several years. Many different machines from a large number of vendors can be purchased for tasks including logic/fault simulation, electrical circuit simulation, placement and routing etc. The speed-ups that can be achieved are many orders of magnitude; the range in cost of these machines might be seen to be comparable! This paper will look at the different types of accelerator available and try to place them in their correct context with the emerging software algorithms that also claim useful speed advantages
  • Keywords
    VLSI; circuit CAD; CAD acceleration; VLSI design; computational effort; electrical circuit simulation; hardware accelerators; logic/fault simulation; placement; routing; software algorithms;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Hardware Accelerators for VLSI CAD - A Tutorial, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • Filename
    209439