Analysis of VLSI interconnects with nonlinear terminations

A method is described for delay estimation of VLSI interconnects with nonlinear terminations. The method is based on piecewise decomposition and asymptotic waveform evaluation (AWE) techniques which offer two to three orders of magnitude speedup when compared to conventional circuit simulators. The analysis method involves four steps. 1. The network equations are formulated using the modified-nodal admittance matrix. 2. Using the piecewise decomposition technique, the nonlinear terminations are replaced by time-dependent sources. 3. The transient response of the resulting linear network is obtained using the AWE technique. 4. The parameters defining the time-dependent sources are evaluated using an iterative technique. The analysis algorithm can be extended to interconnects which contain distributed elements