Title :
Design, implementation and evaluation of a VLSI high speed array processor for real-time image processing morphology operations
Author :
Hassoun, Marwan M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
The author describes the design, implementation, and operation of a prototype application specific integrated circuit (ASIC) VLSI chip designed for image processing applications. The chip is part of a project to design and build a custom imaging board to perform real-time morphological operations running on general purpose workstations and personal computers. The custom imaging board also consists of an ASIC chip that performs histogram stretching applications. The architecture of the chip consists of a processor array structure with local memory to perform the mathematical operations needed on the image, and a parallel comparator tree to produce the results requested on the image
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; computerised picture processing; parallel processing; ASIC; CMOS; VLSI; application specific integrated circuit; custom imaging board; design; evaluation; general purpose workstations; high speed array processor; histogram stretching; implementation; local memory; mathematical operations; operation; parallel comparator tree; personal computers; processor array structure; prototype; real-time image processing morphology operations; real-time morphological operations; Application software; Application specific integrated circuits; Histograms; Image processing; Microcomputers; Morphological operations; Process design; Prototypes; Very large scale integration; Workstations;
Conference_Titel :
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN :
0-7803-0050-5
DOI :
10.1109/ISCAS.1991.176853