Simple expressions for interconnection delay, coupling and crosstalk in VLSI´s

Author

Sakurai, Takayasu ; Kobayashi, Shin´ichi ; Noda, Makato

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1991

fDate

11-14 Jun 1991

Firstpage

2375

Abstract

RC interconnection delay is one of the most essential issues in recent VLSIs. A closed-form formula for a waveform of the RC line with practical boundary conditions is derived. Expressions are also derived for a voltage slope and transition time of the RC interconnection. Other important issues related to interconnections are capacitive coupling of two lines and a crosstalk induced by the capacitive coupling. Expressions are derived for a coupling capacitance and a crosstalk voltage height, which can be used in VLSI designs. Using the expression, optimum line width which minimizes RC delay is discussed

Keywords

VLSI; coupled circuits; crosstalk; integrated logic circuits; metallisation; transmission line theory; RC delay; RC interconnection delay; RC line; VLSI; boundary conditions; capacitive coupling; closed-form formula; crosstalk; crosstalk voltage height; optimum line width; transition time; voltage slope; waveform; Aluminum; Boundary conditions; Capacitance; Crosstalk; Delay effects; Propagation delay; Radio control; Semiconductor devices; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., IEEE International Sympoisum on

Print_ISBN

0-7803-0050-5

Type

conf

DOI

10.1109/ISCAS.1991.176856

Filename

176856