Title :
High performance firmware architecture for FIR filtering in DSP processors
Author :
Scarpaci, Sebastiano ; Suardi, Andrea ; Geraci, Angelo ; Ripamonti, Giancarlo
Author_Institution :
Politecnico di Milano, Milan
fDate :
Oct. 26 2007-Nov. 3 2007
Abstract :
The paper presents a technique for implementing finite impulse response (FIR) filtering in last generation digital signal processors (DSP), which has been specifically designed and developed. Thanks to a fully assembler coded firmware that exploits at best the device resources, a maximum parallel data processing architecture can be implemented that considerably improves the filtering process efficiency with respect to standard solutions that are based on C language firmware codes.
Keywords :
C language; FIR filters; digital signal processing chips; firmware; parallel architectures; C language firmware codes; DSP processors; FIR filtering; assembler coded firmware; digital signal processors; finite impulse response filtering; parallel data processing architecture; Assembly; Data processing; Digital filters; Digital signal processing; Digital signal processors; Filtering; Finite impulse response filter; Microprogramming; Signal design; Signal generators;
Conference_Titel :
Nuclear Science Symposium Conference Record, 2007. NSS '07. IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-0922-8
Electronic_ISBN :
1095-7863
DOI :
10.1109/NSSMIC.2007.4436374
