DocumentCode :
2835117
Title :
Error detection in arithmetic circuits using divisibility checking
Author :
Yassine, H.M.
Author_Institution :
Dept. of Electr. Eng., Brunel Univ., Uxbridge, UK
fYear :
1990
fDate :
12-14 Aug 1990
Firstpage :
1194
Abstract :
Divisibility checking for error detection in arithmetic circuits is proposed. This technique is based on encoding the operands of an arithmetic operation according to a divisibility rule which is function of all the bits in the operand. The coding scheme is capable of checking single errors in arithmetic operations, data transmission, and memory protection
Keywords :
digital arithmetic; encoding; error detection codes; arithmetic circuits; arithmetic operations; data transmission; divisibility checking; encoding; error detection; memory protection; operands; Arithmetic; Circuit faults; Data communication; Digital systems; Error correction; Fault detection; Fault tolerant systems; Hardware; Protection; Redundancy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-0081-5
Type :
conf
DOI :
10.1109/MWSCAS.1990.140941
Filename :
140941
Link To Document :
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