• DocumentCode
    2835231
  • Title

    Analysis and design of low-voltage CMOS current memory cells using switched current techniques

  • Author

    Aki, Y. ; El-Sayed, M. ; Aboul-Seoud, A.K.

  • Author_Institution
    Dept. of Electr. Eng., Alexandria Univ., Egypt
  • fYear
    2003
  • fDate
    9-11 Dec. 2003
  • Firstpage
    55
  • Lastpage
    58
  • Abstract
    This paper presents a detailed temporal analysis of two-step switched current (S2I) memory cells. Also, a new design of an SI current copier operating with a single 1V supply is presented. The analysis and design are supported and validated by SPICE simulations using 0.25 μm CMOS process parameters.
  • Keywords
    CMOS integrated circuits; CMOS memory circuits; SPICE; switched current circuits; 0.25 micron; 1 V; CMOS current memory cells; SPICE simulations; memory cells; switched current method; Analytical models; CMOS process; Circuit simulation; Clocks; Joining processes; Power supplies; SPICE; Switched capacitor circuits; Switching circuits; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
  • Print_ISBN
    977-05-2010-1
  • Type

    conf

  • DOI
    10.1109/ICM.2003.1287721
  • Filename
    1287721
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2835231