• DocumentCode
    2835419
  • Title

    FPGA FFT implementation

  • Author

    Churayev, S.O. ; Matkarimov, B.T.

  • Author_Institution
    Kazakh-British Tech. Univ., Almaty, Kazakhstan
  • fYear
    2010
  • fDate
    17-20 Sept. 2010
  • Firstpage
    183
  • Lastpage
    185
  • Abstract
    We consider FPGA design flow with C/C++ to Verilog translation and verification and report on FPGA implementation of fast Fourier transform and Wiener filter for noise reduction of speech signals on Xilinx Virtex-4.
  • Keywords
    C++ language; Wiener filters; fast Fourier transforms; field programmable gate arrays; hardware description languages; signal denoising; speech processing; C-C++; FPGA FFT implementation; Verilog translation; Wiener filter; Xilinx Virtex-4; fast Fourier transform; noise reduction; speech signals; Clocks; Field programmable gate arrays; Flip-flops; Hardware design languages; Random access memory; Synchronization; Wiener filter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Test Symposium (EWDTS), 2010 East-West
  • Conference_Location
    St. Petersburg
  • Print_ISBN
    978-1-4244-9555-9
  • Type

    conf

  • DOI
    10.1109/EWDTS.2010.5742111
  • Filename
    5742111
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2835419