An Application-Specific Protocol/Network for Massive Parallel Testing

In an effort to substantially reduce the relatively high chip testing time, an application specific protocol/network named Test Area Network (TAN) is proposed based on the open standard suggestion for automatic test equipment. TAN architecture speeds up testing manifold and thus reduces the overall test cost significantly. The advantages of the proposed architecture come from the radically new idea of using packet switched network as the mode of communication between test equipment and tens of device under test.