DocumentCode :
2836654
Title :
An efficient implementation of the 1D DCT using FPGA technology
Author :
EL-Banna, Hassan ; EL-Fattah, Alaa A. ; Fakhr, Waleed
Author_Institution :
Electron. Res. Inst., Cairo, Egypt
fYear :
2003
fDate :
9-11 Dec. 2003
Firstpage :
278
Lastpage :
281
Abstract :
This paper describes and represents different algorithms and efficient implementation of One Dimensional 8 point Discrete Cosine Transform on Field Programmable Gate Arrays. One of the main objectives is to minimize the complexity of operations as much as possible while maintaining low delays and high speed throughput. Distributed Arithmetic is a powerful technique that has been used for fast and efficient implementation of 1D DCT on FPGA.
Keywords :
discrete cosine transforms; distributed arithmetic; field programmable gate arrays; 1D DCT implementation; FPGA technology; complexity; distributed arithmetic; field programmable gate arrays; high speed throughput; low delays; one dimensional 8 point discrete cosine transform; Arithmetic; Computer architecture; Delay; Discrete Fourier transforms; Discrete cosine transforms; Field programmable gate arrays; Image coding; MPEG standards; Optimization methods; Transform coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN :
977-05-2010-1
Type :
conf
DOI :
10.1109/ICM.2003.1287801
Filename :
1287801
Link To Document :
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