A mechanism for interconnecting high-speed hosts and LANs via an ATM network, and analysis of its end-to-end delays

A mechanism is presented for interconnecting high-speed hosts and high-speed local area networks (LANs) via an asynchronous transfer mode (ATM) network. Also presented are upper bound estimates of the end-to-end delays for varying conditions of network traffic. The mechanism uses a simple bandwidth arbitration scheme among network end-points to avoid focusing while interconnecting high-speed end-devices operating at rates ranging up to 100 Mbps. From the delay analysis, it is found that the mechanism presented is viable, especially when the end devices are expected to exchange large data blocks