DocumentCode
2837831
Title
The DN 10000TX: a new high-performance PRISM processor
Author
Bahr, R. ; Ciavaglia, S. ; Flahive, B. ; Kline, M. ; Mageau, P. ; Nickel, D.
Author_Institution
Hewlett-Packard, Chelmsford, MA, USA
fYear
1991
fDate
Feb. 25 1991-March 1 1991
Firstpage
90
Lastpage
95
Abstract
The Hewlett-Packard DN 10000TX scales the original DN 10000 processor design to twice the performance through the use of more aggressive semiconductor technologies. The original eleven VLSI chip CPU design has been recast onto eight VLSI chips including a 1.0- mu m structured-custom chip, five submicron gate arrays, and one bipolar floating-point chip. Continuing to exploit the PRISM architecture to achieve multiple operations per cycle, the 36.36 MHz operation provides performance comparable to that of much higher frequency processors. The authors review the DN 10000 product family, and then present in some detail the goals, design approach, and processor implementation of the DN 10000TX.<>
Keywords
VLSI; microprocessor chips; parallel architectures; 1 micron; 36.36 MHz; DN 10000TX; Hewlett-Packard; VLSI chip CPU design; bipolar floating-point chip; gate arrays; high-performance PRISM processor; Central Processing Unit; Engines; Graphics; Integrated circuit technology; Microprocessors; Nickel; Process design; Supercomputers; Very large scale integration; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon Spring '91. Digest of Papers
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-2134-6
Type
conf
DOI
10.1109/CMPCON.1991.128789
Filename
128789
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