Fault diagnosis for analog integrated circuits based on the circuit layout

Author

Liu, Hain-Ching H. ; Soma, Mani

Author_Institution

Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA

fYear

1991

fDate

26-27 Sep 1991

Firstpage

134

Lastpage

139

Abstract

An approach to the fault diagnosis for analog integrated circuits is proposed. It uses fault models from the defect statistics to generate faulty circuits. Fault simulations are then applied to those faulty circuits to generate different fault classes which can be used for the fault diagnosis for analog integrated circuits. An example is also given to demonstrate this approach

Keywords

SPICE; fault location; integrated circuit testing; linear integrated circuits; analog integrated circuits; circuit layout; defect statistics; fault classes; fault models; faulty circuits; Analog circuits; Analog integrated circuits; Circuit faults; Circuit simulation; Circuit testing; Fault diagnosis; Fault location; Integrated circuit testing; Probability; Statistics;

fLanguage

English

Publisher

ieee

Conference_Titel

Fault Tolerant Systems, 1991. Proceedings., Pacific Rim International Symposium on

Conference_Location

Kawasaki

Print_ISBN

0-8186-2275-X

Type

conf

DOI

10.1109/{RFTS.1991.212953

Filename

212953

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=283834