Title :
FPGA implementation of elementary generalized unitary rotation with CORDIC based architecture
Author :
Misans, P. ; Derums, Uldis ; Kanders, V.
Author_Institution :
Fac. of Electron. & Telecommun., Riga Tech. Univ., Riga, Latvia
Abstract :
This paper describes the first trial of implementation of generalized unitary Jacobi-like rotation (the device is called EGU-rotator, further referred to as rotator) purely based on the CORDIC algorithm into Altera´s and Xilinx FPGAs. The basics and examples for factorization of the generalized rotation matrix (further, matrix) are given. The number of matrix shapes alternates in the range from 4 to 64 depending on the range of used angles (parameters). A unified algorithm for implementation of parametrical rotator is provided. Reconfigurable architecture of rotator is briefly described. The choice of architecture is determined by 3 addresses and they correspond to different shapes of the matrix. The comparison of device resources for different wordlengths, the number of CORDIC iterations and platforms is given. The complex rotator works approximately 3 times slower and consumes approximately 5 times more device resources than a single CORDIC rotator.
Keywords :
digital arithmetic; field programmable gate arrays; iterative methods; matrix decomposition; reconfigurable architectures; Altera FPGA; CORDIC based architecture algorithm; EGU-rotator; FPGA; Xilinx FPGA; elementary generalized unitary rotation; generalized rotation matrix factorization; generalized unitary Jacobi-like rotation; parametrical rotator; reconfigurable architecture; single CORDIC rotator; Computer architecture; Field programmable gate arrays; Indexes; Jacobian matrices; Shape; Transforms; Vectors; CORDIC algorithm; FPGA; Unitary transforms; unitary Jacobi matrix;
Conference_Titel :
NORCHIP, 2012
Conference_Location :
Cpenhagen
Print_ISBN :
978-1-4673-2221-8
Electronic_ISBN :
978-1-4673-2222-5
DOI :
10.1109/NORCHP.2012.6403102
