Title :
Status of device mobility enhancement through strained silicon engineering
Author :
Mazure, C. ; Cayrefourcq, I.
Author_Institution :
Soitec S.A., Pare Technologiques des Fontaines, Bernin, France
Abstract :
Strained silicon engineering has become a key innovation to enhance device on-current. It has allowed the IC industry to keep on the scaling path and assure a performance gain from one technology node to the next. Uniaxial strained silicon has already made its way into 90nm IC manufacturing. Biaxial wafer level strain may be the next step for boosting transistor performance. At the substrate level, strained silicon on insulator is a major innovation that offers higher carrier mobility, combining the advantages of SOI with those of strained silicon. This review focuses on the development of strained silicon, its impact on device properties and its scalability beyond 65nm design rules.
Keywords :
carrier mobility; elemental semiconductors; integrated circuit design; integrated circuit manufacture; leakage currents; silicon; silicon-on-insulator; 90 nm; biaxial wafer level strain; carrier mobility; device mobility enhancement; device on-current; device properties; integrated circuit industry; integrated circuit manufacturing; strained silicon engineering; strained silicon on insulator; transistor performance; uniaxial strained silicon; Design engineering; Gunn devices; Photonics; Silicon;
Conference_Titel :
SOI Conference, 2005. Proceedings. 2005 IEEE International
Print_ISBN :
0-7803-9212-4
DOI :
10.1109/SOI.2005.1563517