Title :
Experimental characterization of source-to-drain tunneling in 10nm SOI devices
Author :
Lolivier, J. ; Jehl, X. ; Rafhay, Q. ; Poiroux, T. ; Vinet, M. ; Previtali, B. ; Sanquer, M. ; Balestra, F. ; Deleonibus, S.
Author_Institution :
CEA/DRT-LETI, Grenoble, France
Abstract :
This work deals with the electrical characterization down to 4K of fully depleted SOI MOSFET with a physical gate length down to 10nm. Temperature measurements are used to highlight source to drain tunneling: which is evidenced at room temperature for the first time. Finally resonant tunneling effect is observed.
Keywords :
MOSFET; nanotechnology; resonant tunnelling; silicon-on-insulator; 10 nm; 4 K; fully depleted SOI MOSFET; resonant tunneling effect; source-to-drain tunneling; temperature measurements; Electrostatics; Impurities; Lithography; MOSFET circuits; Production; Resonant tunneling devices; Scalability; Silicon; Temperature dependence; Temperature measurement;
Conference_Titel :
SOI Conference, 2005. Proceedings. 2005 IEEE International
Print_ISBN :
0-7803-9212-4
DOI :
10.1109/SOI.2005.1563525
