• DocumentCode
    2839738
  • Title

    Resource sharing control in Simultaneous MultiThreading microarchitectures

  • Author

    Liu, Chen ; Gaudiot, Jean-Luc

  • Author_Institution
    Dept. of Electr. & Comput. Eng. & Comput. Sci., New Haven Univ., West Haven, CT
  • fYear
    2008
  • fDate
    4-6 Aug. 2008
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    Simultaneous multithreading (SMT) achieves improved system resource utilization and accordingly higher instruction throughput because it exploits thread-level parallelism (TLP) in addition to conventional instruction-level parallelism (ILP). The key to high-performance SMT is to optimize the distribution of shared system resources among the threads. However, existing dynamic sharing mechanism has no control over the resource distribution, which could cause one thread to grab too many resources and clog the pipeline. Existing fetch policies address the resource distribution problem only indirectly. In this work, we strive to quantitatively determine the balance between controlling resource allocation and dynamic sharing of different system resources with their impact on the performance of SMT processors. We find that controlling the resource sharing of either the instruction fetch queue (IFQ) or the reorder buffer (ROB) is not sufficient if implemented alone. However, controlling the resource sharing of both IFQ and ROB can yield an average performance gain of 38% when compared with dynamic sharing case. The average L1 D-cache miss rate has been reduced by 33%. The average time that the instruction resides in the pipeline has been reduced by 34%. This demonstrates the power of the resource sharing control mechanism we propose.
  • Keywords
    parallel architectures; resource allocation; software architecture; instruction fetch queue; instruction-level parallelism; reorder buffer; resource distribution; resource sharing control; resource utilization; shared system resources; simultaneous multithreading microarchitectures; Control systems; Microarchitecture; Multithreading; Parallel processing; Performance gain; Pipelines; Resource management; Surface-mount technology; Throughput; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Systems Architecture Conference, 2008. ACSAC 2008. 13th Asia-Pacific
  • Conference_Location
    Hsinchu
  • Print_ISBN
    978-1-4244-2682-9
  • Electronic_ISBN
    978-1-4244-2683-6
  • Type

    conf

  • DOI
    10.1109/APCSAC.2008.4625432
  • Filename
    4625432