Title :
Research and Implementation of Test Scheduling Based on the SOC General Structure of Model
Author :
Jing Gu ; Yang Guang ; Yu Xiaoyang
Author_Institution :
Inst. of Comput. Sci. & Technol., Harbin Univ. of Sci. & Technol., Harbin, China
Abstract :
In order to resolve the wrapper optimization and TAM co-optimization issues, this paper presented a new technique based on neural network combined with genetic algorithm to achieve dynamic scheduling test resources.The result of experiments on ITC´02 benchmark indicates that this method could make minimize the testing time for SOC.
Keywords :
genetic algorithms; integrated circuit testing; neural nets; system-on-chip; SOC general structure; TAM cooptimization issues; genetic algorithm; neural network; test scheduling; wrapper optimization; Biological neural networks; Computer science; Dynamic scheduling; Genetic algorithms; Integrated circuit testing; Job shop scheduling; Logic testing; Neural networks; Processor scheduling; System testing;
Conference_Titel :
Information Engineering and Computer Science, 2009. ICIECS 2009. International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-4994-1
DOI :
10.1109/ICIECS.2009.5364695
