The formation of sub-micro partial SOI materials by SIMOX technology

Author

Sun, Jiayin ; Chen, Jing ; Chen, Meng ; Wang, Xi

Author_Institution

Chinese Acad. of Sci., Shanghai Inst. of Microsyst. & Inf. Technol., China

fYear

2005

fDate

3-6 Oct. 2005

Firstpage

92

Lastpage

93

Abstract

In this paper, we try to fabricate sub-micro windows in BOX layer. The pattern thermal oxide layer we used for mask implantation was shown. The typical widths of thermal oxide strips are 150nm and ∼75nm and the space of each strips is 1μm. The O⁺ ions are implanted through the patterned masking oxide. The XTEM images of the SOI structures are shown. The widths of BOX windows are 236nm (left) and 150 nm (right). It is very interesting that the windows are about 75 nm wider than the corresponding masking strips.

Keywords

SIMOX; buried layers; ion implantation; masks; semiconductor doping; transmission electron microscopes; 1 micron; 236 nm; BOX layer; SIMOX technology; SOI structures; XTEM images; buried oxide layer; mask implantation; masking oxide; masking strips; partial SOI materials; silicon-on-insulator; sub-micro windows; thermal oxide layer; thermal oxide strips; Annealing; Information technology; Insulation; Lithography; Materials science and technology; Power integrated circuits; Silicon on insulator technology; Strips; Sun; Thermal conductivity;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2005. Proceedings. 2005 IEEE International

ISSN

1078-621X

Print_ISBN

0-7803-9212-4

Type

conf

DOI

10.1109/SOI.2005.1563547

Filename

1563547