DocumentCode :
2840533
Title :
Impact of BOX scaling on 30 nm gate length FD SOI MOSFET
Author :
Fujiwara, M. ; Morooka, T. ; Yasutake, N. ; Ohuchi, K. ; Aoki, N. ; Tanimoto, H. ; Kondo, M. ; Miyano, K. ; Inaba, S. ; Ishimaru, K. ; Ishiuchi, H.
Author_Institution :
SoC R&D Center, Toshiba Corp. Semicond. Co., Kanagawa, Japan
fYear :
2005
fDate :
3-6 Oct. 2005
Firstpage :
180
Lastpage :
182
Abstract :
This paper presents the first demonstration of ultra-thin BOX FD SOI devices with nominal gate length of 30 nm. The characteristics of FD SOI MOSFETs are investigated in detail as TBOX is varied from 5 nm to 145 nm. In addition, optimum design regions of TBOX for achieving performance requirements are demonstrated.
Keywords :
MOSFET; nanotechnology; silicon-on-insulator; 30 nm; BOX scaling; FD SOI MOSFET; buried oxide; silicon-on-insulator; ultra-thin BOX FD SOI devices; CMOS process; Doping; Fabrication; MOSFET circuits; Manufacturing processes; Oxidation; Plasma sources; Semiconductor device manufacture; Substrates; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 2005. Proceedings. 2005 IEEE International
ISSN :
1078-621X
Print_ISBN :
0-7803-9212-4
Type :
conf
DOI :
10.1109/SOI.2005.1563581
Filename :
1563581
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2840533
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