DocumentCode
2840558
Title
PixelStamp graphics subsystems for the DECstation 5000
Author
Hussain, Z. ; Kelleher, B.
Author_Institution
Digital Equipment Corp., Palo Alto, CA, USA
fYear
1991
fDate
Feb. 25 1991-March 1 1991
Firstpage
234
Lastpage
238
Abstract
The authors describe the architecture of the PixelStamp rendering processor and the implementation of that architecture for the DECstation 5000 Model 200. The PixelStamp architecture provides a range of 2-D and 3-D graphics subsystem implementations sensitive to both cost and performance. The first implementations of the PixelStamp architecture present a range of graphics subsystems for the DECstation 5000 Model 200. A PX module is an eight-plane double buffered system that increases the rendering performance over the basic color frame buffer, but has no special-purpose geometry processing hardware for 3-D applications. The PXG-8 module offers the same rendering hardware as the PX module, with the addition of special-purpose geometry processing hardware and an optional 24-b depth buffer. The PXG-24 module is an upgrade from the PXG-8 module to give 24 planes of color information, double buffered. The PXG Turbo module is a 24-plane system that increases the rendering performance with the addition of a Stamp chip.<>
Keywords
DEC computers; computer architecture; computer graphic equipment; workstations; 24 bit; 2D graphics; 3D graphics; DECstation 5000; PX module; PXG Turbo module; PXG-24 module; PXG-8 module; PixelStamp graphics subsystems; PixelStamp rendering processor; Stamp chip; basic color frame buffer; color information; special-purpose geometry processing hardware; Bandwidth; Buffer storage; Costs; Displays; Graphics; Hardware; Pixel; Rendering (computer graphics); Systems engineering and theory; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon Spring '91. Digest of Papers
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-2134-6
Type
conf
DOI
10.1109/CMPCON.1991.128812
Filename
128812
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